Posts Tagged ‘register access description’

Posted on May 11, 2016 in Boundary Scan Test, onTAP JTAG Blog

Introduction As miniaturization of PCBs became more desirable, denser (or layered) printed circuit boards began to dominate the market. Testing electrical connectivity between devices posed a huge problem because  board density and complex layering prevented the IC pins from being physically probed. The Joint Test Action Group (JTAG) developed a solution: boundary scan. The Joint Test […]