Posts Tagged ‘JTAG’

Posted on September 2, 2020 in JTAG Boundary Scan

Formed in 1985, Joint Test Action Group (JTAG) developed a method of verifying designs and testing printed circuit boards after manufacture. This method would later become the industry standard. Known as a JTAG test,.

Posted on July 1, 2020 in circuit trace testing

In today’s world, there’s no avoiding technology. Whether you consider yourself “tech savvy” or not, there’s no escaping the continuously changing expectations of society. However, with the increasing demands comes a need for increased security.

Posted on March 1, 2020 in flynn systems, JTAG

When large numbers of outputs switch simultaneously, they can cause intermittency with your test due the ground bounce effect. JTAG Test with onTAP lets you control this problem by giving you control over how many outputs switch during a single test scan, as shown below:   Understanding ground bounce In manufacturing test environments, it’s not […]

Posted on January 20, 2018 in Boundary Scan, Boundary Scan Test, JTAG Boundary Scan

Are you new to boundary scans and JTAG? Take a look at this quick guide to understanding what exactly it means, and why JTAG is essential. JTAG stands for Joint Test Action Group. When referred to as part of a boundary scan test, it means computer chips and electronic devices that are made according to […]

Posted on June 12, 2017 in JTAG, JTAG Boundary Scan, onTAP, onTAP JTAG Blog

Once a board developer passes along the new board and all related files and procedures to a test developer, the boundary scan test process can begin. We recommend including the TAP Integrity Test at the beginning of your interconnect test because the TAP contains pins associated with the test access controller, e g., the TAP […]

Chip manufacturers are now producing multichip modules (MCMs) that may include two or more arrays of devices within a single package. These modules can be tested using JTAG test pattern generation of the devices while on a PCB. To incorporate JTAG testing of MCMs there are several things that are needed: a netlist of the […]

Posted on April 8, 2015 in onTAP JTAG Blog

Design for Testability, often referred to as DFT, is a critical part of developing a new board. Here’s a link to a terrific class lecture from University of Maryland if you’re interested in seeing a well represented academic presentation of such an important topic.

Posted on March 18, 2014 in Boundary Scan, JTAG, JTAG Boundary Scan, onTAP, onTAP JTAG Blog

It’s the return of the Gadget Smackdown, brought to you by EE Live!  This year, the SMACKDOWN takes place April 1–3 in the EE Times Fantastical Theater of Engineering Innovation at the San Jose convention Center, where the EE Live! Conference and Expo is being held. The presser for this event encourages anyone who loves […]

We are constantly exposed to new situations in boundary scan test and new approaches to using boundary scan to achieve better test fault coverage. One item standing in the way of higher, more accurate fault coverage is common tri-state control cells.

Posted on April 6, 2009 in Boundary Scan, JTAG, JTAG Boundary Scan, onTAP, Press Releases

FOR IMMEDIATE RELEASE Contact: Ryan Flynn Flynn Systems Corp. 74 Northeastern Blvd, STE 16A Nashua, NH 03062 603-598-4444 Sales@flynn.com onTAP Series 4000: Escape Communications Embedded JTAG Test and Programming Solution NASHUA, NH April 3, 2009 – Flynn Systems Corp is proud to announce that Escape Communications, of Torrance, California, (www.escapecom.com), a trusted provider of point-to-point […]