JTAG.TECT Reviews onTAP JTAG System

Posted on October 29, 2009

                                                                                    

Written by: Dr. Ami Gorodetsky of JTAG.TECT Russian JTAG.TECT onTAP Boundary Scan Solutions Russian Distributor


Please follow this link for the original Russian:
http://www.jtag-test.ru/JTAGUniversity/articles/12-PE_6_2009.php

View Dr. Ami Gorodetsky’s blog:
http://moodle.cs.huji.ac.il/cs08/course/view.php?id=67703

In the 7th paper of our “JTAG and DFT Basics Tutorial” series we had briefly examined the software basics of US based Flynn Systems’ (www.flynn.com ) onTAP Boundary Scan system that is intended for the JTAG test development, execution, and debugging, but the system hardware was not mentioned in the paper. In this sequential 12th paper of the series we will overview the hardware of this very popular test system that is in worldwide usage for the JTAG-based test and in-circuit programming and flash burn-in stations, both in the lab environment and on the production facilities.
One of the noticeable and special features of the onTAP, which fairly distinguishes it from the hardware of competitor’s systems, is the surprising simplicity and mobility of the onTAP interface and, correspondingly, its low price. The onTAP hardware consists of the following three groups: two interface USB-adapters (the 6 MHz FS-9160 and the 30 MHz Dual Channel FS-9165), the FS-9180 TAP Serializer and GPIO Board, and a series of parallel JTAG-cables of different vendors (Xilinx, Altera, Lattice, etc.) that onTAP also supports. Designation of both USB-adapters, connected between a user’s PC and the UUT, is to support the operating voltages in the range of 1.8V to 5V, to increase the loading capacity and noise protection of the JTAG bus, and therefore, notably increasing the permissible distance between the PC-based test station and the UUT without any additional TCK frequency constraints.
The USB interface adapters together with the onTAP software allow for an easy and very mobile platform, without any noticeable limitations, to enlarge a quantity of JTAG chains utilized in the test, identical or different. In other words, the JTAG test preparation for a printed circuit board that contains n JTAG chains requires to have n FS-9160 adapters, or n/2 FS-9165adapters. With the usage of the FS-9180 TAP Serializer and GPIO Board the number of adapters can be substantially reduced. The same hardware setup (with the FS-9180 TAP Serializer or without it) also supports the simultaneous testing of n identical printed circuit boards with one or several JTAG chains; this situation is frequently encountered during the testing of similar printed circuit boards in mass production.

 

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