A Brief Overview
The boundary scan test architecture provides a way to test interconnects between integrated circuits (ICs) on a board without using physical test probes. It contains cells within a device that can capture data from pin or core logic signals or force data onto pins. The captured data is shifted out and externally compared to other results. Forced test data is shifted into the boundary scan cells. This is all controlled from a data path called the scan path or scan chain.
By allowing direct access to nets, boundary scan can eliminate the need for a large number of test vectors. These test vectors are normally needed to properly initialize sequential logic. The benefits of boundary scan technology were quickly realized through shorter test times, higher test coverage, increased diagnostic capability and lower equipment cost.
While boundary scan testing is frequently used in the production phase of a product, this technology is also extremely beneficial when applied to product design, prototype debugging and field service. Thus, the cost can be incorporated over the entire life cycle of the product.
JTAG defines test logic through an integrated circuit, which provides applications to perform five basic duties:
- Chain integrity testing
- Interconnection testing between devices
- Core logic testing (BIST)
- In-system programming (FLASH Programming)
- Functional testing (DDR, SRAM, FLASH, UART, etc.)
Flynn Systems Corporation, offers onTAP, a dynamic PC-based boundary scan test software suite. onTAP Boundary Scan provides a cost-effective test solution which encompasses the entire life cycle of a product from development through production. onTAP Boundary Scan technology offers solutions to handle problems such as:
• Boards that include components assembled on both sides, burying most of the through-holes, thus making them inaccessible
• Small-size products that do not have test points, making it difficult or impossible to probe suspected nodes
• Loss of physical access to fine pitch components, making it complicated to distinguish between manufacturing and design issues
An example of some of the device types typically tested using boundary scan technology are:
- CPLDs, FPGAs, processors chained together in a boundary scan path
- Non-boundary scan components such as SRAM, SD-RAM, DDR2, DDR3
- Programmable FLASH
- Series resistors or buffers—making them transparent
- I2C devices
There are critical tests that should be performed to test these devices, such as:
- TAP Infrastructure/ID Code Test
- Interconnect Test
- Mid-state/Resistive Shorts
- Incorporating Multi-die devices
- Opens and Shorts Tests
- Pull Up/Pull Down
- I2C Bus Control and Test
- Memory/Flash Test & Programming
- Cluster tests
- 1149.6 – AC Coupled Circuit/Differential Pairs
For more information regarding onTAP or Boundary Scan, contact Flynn systems at
(603)-598-4444 or visit the website at www.flynn.com.