Posted on June 12, 2017 in JTAG, JTAG Boundary Scan, onTAP, onTAP JTAG Blog

Once a board developer passes along the new board and all related files and procedures to a test developer, the boundary scan test process can begin. We recommend including the TAP Integrity Test at the beginning of your interconnect test because the TAP contains pins associated with the test access controller, e g., the TAP […]

Chip manufacturers are now producing multichip modules (MCMs) that may include two or more arrays of devices within a single package. These modules can be tested using JTAG test pattern generation of the devices while on a PCB. To incorporate JTAG testing of MCMs there are several things that are needed: a netlist of the […]

Posted on March 18, 2014 in Boundary Scan, JTAG, JTAG Boundary Scan, onTAP, onTAP JTAG Blog

It’s the return of the Gadget Smackdown, brought to you by EE Live!  This year, the SMACKDOWN takes place April 1–3 in the EE Times Fantastical Theater of Engineering Innovation at the San Jose convention Center, where the EE Live! Conference and Expo is being held. The presser for this event encourages anyone who loves […]

Use this function to: Check the fault coverage of your test for a specific fault condition. Insert an open fault without modifying your board or test fixture. Validate that your test is working as expected. How to Insert Faults 1. Create a file FaultInsert.txt in your test project directory. 2. Add fault declarations to the […]

Posted on February 12, 2013 in onTAP, onTAP JTAG Blog, onTAP Usage

What Does onTAP Test?   As boundary scan technology grows in popularity, more JTAG compliant devices (1149.1 and 1149.6) are now being included in board design, along with more JTAG chains that often require simultaneous testing. The great advantage to using onTAP, is that there are no restrictions on the number of devices in a […]

Posted on December 18, 2012 in Boundary Scan Test, onTAP, onTAP JTAG Blog

  Our Development team has been busy at work on a new UI for onTAP. We’re all excited about the new look and we’re sure you will like it as much as we do. We expect to introduce our new and improved onTAP mid-to-late Q1 2013, so stay tuned for updates. In the meantime, all […]

Many newcomers to JTAG test start their first projects knowing only that boundary scan testing is a requirement for new board design. The specifics of boundary scan, details of test strategy, or expected results are, for many, uncharted territory. In fact, most newcomers to boundary scan testing are uncertain as to what questions to ask […]

Thank you for your interest in onTAP Boundary Scan software.  Please download and install onTAP Boundary Scan Software on your target machine.  Once you install onTAP, open and run the software.  This will generate a license.txt file, which is found in the …\Flynn Systems Corp\onTAP folder.  Please copy this file and e-mail it to license@flynn.com.  We […]

Posted on March 21, 2012 in onTAP, onTAP JTAG Blog, onTAP Reviews, Product News

SMT Magazine: “onTAP Software includes every feature necessary to develop tests for complex multi-board assemblies without expensive add-ons. Apart from performing interconnect or CPLD/FLASH programming, this software also has the capability of developing custom cluster tests.”

Flynn Systems Corp (FSC), developer of onTAP Boundary Scan Solutions, and Keyware Technology Co., Ltd. the Chinese software test technology leader in strategies and development of boundary scan and functional test, have established a new strategic relationship.

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