onTAP JTAG Blog

Testing your Boards with Boundary Scan

Testing your Boards with Boundary Scan

There are many different options out there to be testing boards when it comes to the design and manufacturing process of various products. However, we believe that using a boundary scan/JTAG test is the best way to test your boards and have compiled a few reasons...

3 Benefits of Boundary Scan

3 Benefits of Boundary Scan

In the world of every evolving and changing technology, boundary scan has played a large part in getting new items to the market. Boundary scan was created in an effort to make accessibility to testing multiple boards with a single system. To help you better...

The demand for Boundary Scan in Aerospace Technology

The demand for Boundary Scan in Aerospace Technology

New technologies in aerospace are constantly being built, tested, approved and launched. For example in 2019, Virgin Orbit launched LauncherOne, outfitting a Boeing 747 to launch the 70ft long rocket from its left wing into outer space. The rocket successfully entered...

Arriving at Boundary Scans

Arriving at Boundary Scans

In an age where technology is king, electric systems have become part of everyday life. From our smartphones to medical equipment every piece of technology has been able to advance, thanks to rapid changes in how we work with electric systems. Innovation and creation...

Exploring the field of Electronic Engineering

Exploring the field of Electronic Engineering

Engineering has many different branches that students can expand into as they complete their college degrees and begin searching in the field for a position. Within the world of electric engineering is the smaller yet essential area of electronic engineering.  This...

How Test Developers Can Save Their Company Time and Money

How Test Developers Can Save Their Company Time and Money

If a chain of devices consisted only of boundary scan (JTAG) compliant devices, there would not be too much testing required. However, boards today contain complex, non-JTAG devices that interact with the boundary scan devices. Testing just the JTAG devices on the...

Finding Faults with the Test Access Port (TAP)

Finding Faults with the Test Access Port (TAP)

Once a board developer passes along the new board and all related files and procedures to a test developer, the boundary scan test process can begin. We recommend including the TAP Integrity Test at the beginning of your interconnect test because the TAP contains pins...

Testing Multichip Modules

Testing Multichip Modules

Chip manufacturers are now producing multichip modules (MCMs) that may include two or more arrays of devices within a single package. These modules can be tested using JTAG test pattern generation of the devices while on a PCB. To incorporate JTAG testing of MCMs...

How Board Developers Can Save Their Company Time and Money

Not every boundary scan application experiences delays. Some run without any problems, but when there is a delay, oftentimes it can be traced back to lack of information from the board’s developer to the board’s tester.

A Look at Boundary Scan Description Language (BSDL)

Introduction As miniaturization of PCBs became more desirable, denser (or layered) printed circuit boards began to dominate the market. Testing electrical connectivity between devices posed a huge problem because  board density and complex layering prevented the IC...

Whose Problem Is This?

Who cares. The owner of the problem is not necessarily always the issue. Blame most often gets thrown around the work place when things don’t work, and a resolution is needed.

How much money is sitting in the bone pile?

One of the most common comments we hear from our customers and business partners sounds something like this: “Well, I’ve heard about boundary scan testing, and have actually used it a bit before. Moving forward, we have a new project we need to use it on, and we have a bone pile I might get to.”

Manufacturing: Save Yourself, & The Project, Lots Of Money!

Now that your board has moved from prototyping to manufacturing, things are humming along until…there is a snag in manufacturing. Suddenly an entire run of boards is failing for unknown reasons, and you’re already dangerously close to being behind schedule.

Reducing Costs During Prototyping

In our last discussion, we talked about DFT, which plays a significant role in reducing costs in prototyping. There are a wide variety of reasons that prototyping is a significant expense in the development and production processes. A large part of the cost is the increasing complexity of designs, inclusion of more processors and FPGA’s, greatly reduced board real estate, and diminishing test access. With the cost of FPGA’s and processors rising as they too become more powerful, getting small batches of devices is expensive. If one of those devices is fried during prototype testing, the cost to prototype a new design escalates rapidly, especially if the cause of the failure isn’t quickly determined.

Design For Testability?

Design for Testability, often referred to as DFT, is a critical part of developing a new board. Here’s a link to a terrific class lecture from University of Maryland if you’re interested in seeing a well represented academic presentation of such an important topic.

How Boundary Scan/JTAG Helps You Improve Your Bottom Line

As electronics production becomes more complex, and more expensive, board designers and manufacturers require tools that are better suited to handling the complexities of new designs. If this sounds like the same story you’ve heard from JTAG test companies for the past 10 – 15 years, it’s because now, more than ever, Boundary Scan Test Software / JTAG test and programming solutions are the best (read: most economical, accurate, safe, reliable, repeatable, consistent, flexible), choice for the handling of modern electronics.

SVF and onTAP Boundary Scan

Why SVF? As boundary scan test was making its way to center stage for testing surface mounted devices, there was no agreed upon protocol to manage the hundreds of thousands of bits of IEEE 1149.1 test pattern information. Instead, many vendors had vendor specific...

Calling Inspector Gadget

It’s the return of the Gadget Smackdown, brought to you by EE Live!  This year, the SMACKDOWN takes place April 1–3 in the EE Times Fantastical Theater of Engineering Innovation at the San Jose convention Center, where the EE Live! Conference and Expo is being held....

Using onTAP to test a board

What Does onTAP Test?   As boundary scan technology grows in popularity, more JTAG compliant devices (1149.1 and 1149.6) are now being included in board design, along with more JTAG chains that often require simultaneous testing. The great advantage to using onTAP, is...

New to Boundary Scan Test?

New to Boundary Scan Test?

Many newcomers to JTAG test start their first boundary scan projects knowing only that boundary scan testing is a requirement for new board design. The specifics of boundary scan, details of test strategy or expected results are, for many, uncharted territory. In...

onTAP Gets a New Look for the New Year!

  Our Development team has been busy at work on a new UI for onTAP. We’re all excited about the new look and we’re sure you will like it as much as we do. We expect to introduce our new and improved onTAP mid-to-late Q1 2013, so stay tuned for updates. In the...

A Quick Reference Guide to Boundary Scan Terms

While not all boundary scan terminology is contained in the guide, there are enough terms to at least acquaint you with some of the most commonly used expressions. BIST: Built-In Self-Test, sometimes controllable via boundary scan BOARD NETLIST: Files that show the...

New To JTAG Boundary Scan Test? You’re not alone…

Many newcomers to JTAG test start their first projects knowing only that boundary scan testing is a requirement for new board design. The specifics of boundary scan, details of test strategy, or expected results are, for many, uncharted territory. In fact, most...

onTAP’s Mention in SMT Magazine

SMT Magazine: “onTAP Software includes every feature necessary to develop tests for complex multi-board assemblies without expensive add-ons. Apart from performing interconnect or CPLD/FLASH programming, this software also has the capability of developing custom cluster tests.”

Boundary Scan that Fits Your Budget

I thought it was important to post something about onTAP being the perfect boundary scan solution for any JTAG user, but especially those in budget critical situations after some weekend reading brought me across a couple of articles in Electronics Weekly about...

onTAP Supports IEEE 1149.6!

As we have promised our users, Flynn Systems continues to develop and add new features to onTAP Boundary Scan Software.  These new features vastly improve onTAP's capability, enabling onTAP users to do more with less.  We had been developing support for IEEE 1149.6...

Groundhog Day Sale

When you purchase any onTAP Boundary Scan Software license, we are giving you the option to add another license to your package for FREE*. That’s right, FREE. Buy a development seat for the lab, or an MTO for manufacturing, and get another one for a co-worker. You have your choice of an MTO or DLL.

Happy New Year – Welcome 2010

We hope everyone is off to a strong and promising 2010.   By all signs, it appears that this year will deliver new innovations and products to the electronics market.  We certainly are excited to hear about our customers new projects and are looking forward to sharing...