In an age where technology is king, electric systems have become part of everyday life. From our smartphones to medical equipment every piece of technology has been able to advance, thanks to rapid changes in how we work with electric systems. Innovation and creation are only able to be implemented in society if they have […]
onTAP JTAG Blog
Engineering has many different branches that students can expand into as they complete their college degrees and begin searching in the field for a position. Within the world of electric engineering is the smaller yet essential area of electronic engineering. This area of study can be found at universities like USC and the University of […]
Mid-state shorts are a major problem that often goes undetected by typical boundary scan connectivity tests is mid-state/resitive shorts. Flynn Systems recognized this “hole” in boundary scan testing and was the first boundary scan test company to test for mid-state shorts, improving test fault coverage.
If a chain of devices consisted only of boundary scan (JTAG) compliant devices, there would not be too much testing required. However, boards today contain complex, non-JTAG devices that interact with the boundary scan devices. Testing just the JTAG devices on the board is always an option. However, developing a test that takes into account […]
Once a board developer passes along the new board and all related files and procedures to a test developer, the boundary scan test process can begin. We recommend including the TAP Integrity Test at the beginning of your interconnect test because the TAP contains pins associated with the test access controller, e g., the TAP […]
Chip manufacturers are now producing multichip modules (MCMs) that may include two or more arrays of devices within a single package. These modules can be tested using JTAG test pattern generation of the devices while on a PCB. To incorporate JTAG testing of MCMs there are several things that are needed: a netlist of the […]
Not every boundary scan application experiences delays. Some run without any problems, but when there is a delay, oftentimes it can be traced back to lack of information from the board’s developer to the board’s tester.
Introduction As miniaturization of PCBs became more desirable, denser (or layered) printed circuit boards began to dominate the market. Testing electrical connectivity between devices posed a huge problem because board density and complex layering prevented the IC pins from being physically probed. The Joint Test Action Group (JTAG) developed a solution: boundary scan. The Joint Test […]
One of the most common comments we hear from our customers and business partners sounds something like this: “Well, I’ve heard about boundary scan testing, and have actually used it a bit before. Moving forward, we have a new project we need to use it on, and we have a bone pile I might get to.”