Boundary Scan Products & Services

The JTAG STIL Player applies STIL files (IEEE Std 1450) to JTAG (IEEE Std 1149.x) ports and reports test results in a ribbon-style Windows UI with docking panels.  The Player relates STIL Macros to JTAG state changes,  BSDL file register selections, as well as data written to and from target device registers.  When a STIL […]

By now you know what makes onTAP such a valuable asset; now learn why onTAP is such a spectacular value!

Run Boundary Scan/JTAG Tests, Program FLASH, and FPGAs

Designed specifically for manufacturing test environments, onTAP enables users to run any onTAP tests, including memory cluster tests and Flash programming. The MTO restricts access to test development screens and files. ProScan provides accurate pin-level diagnostics and simple debug features such as toggling pins.

Speed up your manufacturing process while ensuring accuracy.

Develop, Debug, and Run Boundary Scan/JTAG Interconnect, Cluster Test, and Program FLASH

Features automated, netlist based test development (includes a built-in netlist merge), with minimal user intervention. Quickly and easily develop interconnect tests, memory cluster tests, configure scan devices (CPLDs, FPGAs), and program FLASH. Enables easy incorporation of multiple chains, multi-die modules, merged sub-assemblies, multi-drop configurations.

* Includes all software needed to develop and run tests.

ProScan – Proprietary Graphical Test Development and Debug Environment for onTAP

ProScan provides direct access to development tools and settings in a test environment, facilitating debug for your boundary scan test(s). Power packed with built-in pin-level diagnostics, a netlist browser, pin toggler, and comprehensive test reports, this tool allows you to manage all your boundary scan debug needs from one screen.

Learn more about how ProScan will make your boundary scan project easier and more effective!

Type Usage Flexibility Usage Tracking Control USB Dongle Based (License embedded) Single user license installed on several machines, requires USB dongle for operation Single user, multiple machines, USB Key NO By individual TAP CONNECT JTAG Controller (License embedded) Single user license installed on several machines, requires onTAP TAP CONNECT JTAG Controller for operation Single user, multiple machines, […]

Enables onTAP w/ LabVIEW™ & other Third Party Test Executives

Run all of your onTAP boundary scan tests from any third party test executive, including National Instruments’ LabVIEW™ and Teradyne ATE In-Circuit Test Equipment.

onTAP USB High Speed JTAG Test and Programming Cable – Plug and Play

The TAP CONNECT is the High Speed USB JTAG Test and Programming cable boundary scan test hardware from Flynn Systems. It provides a dual channel, 28.8 MHz link between onTAP and your application(s), using flying leads, Xilinx type header, or Altera type header.

• Adjustable TCK Clock 280KHz – 15MHz + 28.8MHz
• Dual channel – run two chains from one cable
• Adjustable internal voltage 1.8V – 4.5V
• Auto sensing voltage through VREF for devices operating from 1.8V to 5V
• External VREF 1.8V – 4.5V
• Connect to popular Xilinx and Altera style headers, or use flying leads
• Program Flash in less time than standard cables
• Test and program multiple chains at high speeds
• Cut test and programming times by at least 30%
• Hot plug and play

The onTAP Serializer and GPIO board offers two functions on one board. First multiple JTAG chains can be configured into one JTAG chain and secondly 196 general purpose I/O points are available to include in a user’s JTAG chain.

• TAP I/O voltages from 1.8V to 4.5V at each JTAG port
• JTAG Tap Serializer for 1-4 JTAG Taps
• VREF Voltage Sources from 1.8 – 4.5V
• Independent 196 GPIO Drive and Capture Test Points

Expert Turnkey Boundary Scan Test Development Proprietary boundary scan test development procedures include: Flynn Systems’ thorough Interconnect Boundary Scan Test Cluster test model development for testing of non-JTAG memory and flash devices Design for Test (DFT) service Expert evaluation of your board test results and one-on-one online assistance with debug. BSDL syntax verification to IEEE […]

Please choose the boundary scan product document or application note you want to view from one of the links below. The links will take you to a browseable document with a downloadable PDF. If you do not have Adobe Reader, please click here. If there is a topic you do not see, please contact onTAP […]

• Performs both interconnect and cluster tests on DIMM/SODIMM memory sockets using onTAP Boundary Scan Tests
• Tests for opens on PWR and GND pins of the DIMM/SODIMM sockets
• Each I/O pin is independently controlled
• Keyed flat connector compatibility
• Hot Swap
• Equipped with a JTAG/IEEE 1149.1 Test Access Port (TAP)
• Full software support both for use and self-test
• Full compatibility with Flynn Systems’ onTAP Series 4000
• Supports a wide range of DIMM, microDIMM, SODIMM, SOCDIMM, and SORDIMM socket formats

Develop Your Boundary Scan Solution with Confidence!Now with ProScan, onTAP delivers a complete, highly automated, graphical, robust boundary scan solution! IEEE 1149.1 BSDL Syntax CheckerNetlist-based ATG supports over two dozen CAD netlist formatsIntuitive, Graphical Interface for Development and Debug with Netlist BrowserProScan Enabled Development and MTO!Multiple JTAG chainsFlash ProgrammingCluster Tests (DDR4, DDR3, DDR2, SRAM…)GPIO + […]

Let Flynn Systems create turnkey SVF test files for you based on using its industry tested and mature software.

Flynn Systems continues to offer the FS-ATG Software and Test Vector Generation Service as an economical way to get test vectors for your immediate ICT PLD and FPGA testing needs. Our Test Vector Generation Service provides accurate, reliable test vectors for PALs, GALs, CPLDs and FPGAs from well-known device manufacturers (Xilinx, Actel, Altera, Lattice,  etc.). […]