Knowledge Base

Here is a selection of tips and information sheets we’ve put together to help with some of your boundary scan tasks. Below you will find onTAP Boundary Scan product documentation and select onTAP boundary scan/JTAG test application notes. Please choose the document you want to view from one of the links below. The links will open a PDF. If you do not have Adobe Reader, please click here. If there is a topic you do not see, please contact onTAP technical support.

appXam appXam creates boundary scan tests and diagnostics based on qualified application mode signals such as those found in a user’s functional tests. appXam uses application mode signal activity to quickly extend boundary scan fault coverage and diagnostics. The signal activity on a target board may simply be idle mode activity available from system clocks, or it may be purposeful activity created by a system program, for example to read DDR or flash memory. appXam provides the tools to capture this activity and then automatically create test models and add them along with diagnostic messages to a test suite.

Multi-UUT Manager onTAP’s Multi-UUT Manager tool provides a method to duplicate tests when an application requires multiple test boards (UUTs) be tested at one time. This tool allows a developer to create a single set of tests and then duplicate them for as many UUTs as will be tested together.

JTAG Testing for Undetected MidState Shorts Mid-state shorts are a major problem that often goes undetected by typical boundary scan connectivity tests is mid-state/resitive shorts. Flynn Systems recognized this “hole” in boundary scan testing and was the first boundary scan test company to test for mid-state shorts, improving test fault coverage.

Software Fault Insertion Improves boundary scan test diagnostics by letting you verify fault coverage by injecting faults into your test. Increase confidence in your test results.

Eliminating the “Ground Bounce” Effect This test setting option reduces the number of output pins switching simultaneously in any test scan.

Managing Differential I/O Pins Addresses post-configuration I/O for FPGA and CPLD devices.

onTAP Managing Modules Easily include multi-die modules in your test development procedure. Improves test fault coverage.

BIST Built In Self Test, also referred to as user defined test. Shows the procedure to incorporate BIST in your onTAP test strategy.

onTAP True Parallel Test  PC based, parallel JTAG testing speeds manufacturing, and eliminates the need for expensive test hardware.

The TAP CONNECT JTAG CONTROLLER OverviewPDF Description of the onTAP HighSpeed USB JTAG Test and Programming Cable.

onTAP Series 4000 Boundary Scan Software Information

onTAP Overview An overview of onTAP’s capabilities and features within onTAP Series 4000.

onTAP Development Information about the complete boundary scan solution and how onTAP helps speed test development and increase test fault coverage.

onTAP ProScan Graphical Debug Environment This overview of the new graphical debug environment for onTAP Series 4000 provides information showing how ProScan improves your test development and manufacturing testing.

onTAP Manufacturing Product Brief  Learn about how onTAP provides an upgrade path and that fits your manufacturing test and FLASH programming needs.

onTAP DLL & Licenses The onTAP DLL runs with third-party test executives, expanding your test capability.

Printable PDF Describing onTAP Turnkey JTAG Project Solutions Learn how onTAP and Flynn Systems works with you as a partner to maximize test fault coverage, speed test development, time to market, and maximizes your ROI.

onTAP Technical Support  Get more information on the benefits of maintaining a current Flynn Systems Technical Support agreement.

A Brief Overview of BSDL Learn about the Boundary Scan Description Language.

Learn more about creating DTS models Flynn Systems works hard to maintain a current list of working and verified models of all types of memory, flash, and discreet components. All of these models are made using the DTS Language, and are not project specific. These models are flexible, easy to modify, and completely re-usable.

*We have the ability to make and add netlist translators and models for your project.

Application Notes:

onTAP Interconnect Test (Tutorial) Learn how to develop interconnect tests and maximize test fault coverage with onTAP. Tests include basic interconnect, AC Coupled circuits (IEEE 1149.6), loop backs, and mid-state shorts.

onTAP Memory Cluster Testing onTAP handles memory and other non-scan devices such as popular DDR4, DDR3, DDR2, SRAM, SDRAM, I2C,  Ethernet, PCI…

onTAP Flash Programming  onTAP programs flash devices, and calculates an estimated programming time. Direct Drive SPI Flash Programming capability also available.

Learn more about creating DTS models  Use the information in this document to better understand the DTS language and how to adjust onTAP DTS models.

onTAP Bus Management Learn how to boost fault coverage by testing circuits between pins.

onTAP Managing Modules Easily include multi-die modules in your test development procedure.

onTAP Test Types  Discover what onTAP can do, and how it’s proprietary test methods will help you get the most out of your boundary scan test strategy.

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